Open-source RISC-V architecture cannot be export-controlled, giving China a sanctions-proof chip ISA
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RISC-V is an open-source instruction set architecture developed at UC Berkeley that anyone can implement without a license. China has designated RISC-V as a national strategic priority and is building RISC-V chips (Alibaba's Xuantie, SiFive's designs) that are architecturally independent of ARM (UK, subject to controls) and x86 (US, subject to controls). Export controls cannot restrict an open-source ISA because there is no licensable IP to control. This persists because RISC-V was deliberately created as an open standard to avoid proprietary lock-in, and the academic and open-source communities that maintain it operate outside any government's regulatory authority. China adopting RISC-V is a rational response to the demonstrated risk of depending on controllable architectures.
Evidence
https://riscv.org/risc-v-international-members/